Phase-looked loop is a vitally important device. Phase-looked loop is analog and mixed signal building block used extensively in communication, networks, digital systems, consumer electronics, computers, and any other fields that require frequency synthesizing, clock recovery, and synchronization.
Prior Art FIG. 1 illustrates a block diagram of a conventional phase-locked loop. The conventional phase-locked loop 100 typically consists of a phase-frequency detector (or phase detector), a charge-pump 120, a low-pass filter, and a voltage-controlled oscillator in a loop. Phase-locked loops without any frequency divider in a loop are considered here for simplicity. The phase-frequency detector (or phase detector) is a block that has an output voltage with an average value proportional to the phase difference between the input signal and the output signal of the voltage-controlled oscillator. The charge-pump either injects the charge into the low-pass filter or subtracts the charge from the low-pass filter, depending on the outputs of the phase-frequency detector (or phase detector). Therefore, change in the low-pass filter's output voltage drives the voltage-controlled oscillator. The negative feedback of the loop results in the output of the voltage-controlled oscillator being synchronized with the input signal. As a result, the phase-locked loop is in lock.
The conventional charge-pump circuit 120 of Prior Art FIG. 1 is illustrated. Assuming the upper charge-pump current source and the lower charge-pump current source are equal in magnitude, the average current flowing into the output node VC or flow out of the output node VC is expressed as
      I    AVG    =                    Δ        ⁢                                  ⁢                  Φ          IN                            2        ⁢                                  ⁢        π              ⁢          I      CH      where ΔΦIN is the phase difference. When MOS switches turn off, charge-injection errors occur. The channel charge of a switch that has zero drain-source voltage (i.e., VDS) is given by QCH=WLCOX (VGS−VT). As a result, temporary glitches occur. The conventional charge-pump circuit 120 provides direct charge-injection error into the output node VC because the drains of the MOS switches are coupled to the output node VC. Even though the current source and MOS switch are exchanged in the conventional charge-pump circuit 120, indirect charge-injection errors into the output node VC can not be greatly alleviated. For these reasons, the conventional charge-pump circuit 120 of Prior Art FIG. 1 is very inefficient to implement in an integrated circuit (IC) or system-on-chip (SOC).
Thus, what is desperately needed is a high-performance charge-pump circuit that can be highly efficiently implemented with a drastic improvement in suppressing any charge-injection errors, reducing charge-pump offset (i.e., reducing the power of the spurious sidebands in the synthesized output signal), increasing the output impedance for effective current injection, reducing chare-sharing problem, and saving chip area. The present invention satisfies these needs by providing high-performance charge-pump circuits.